Noise and harmonic distortion in mixed-signal circuitry, such as digital to analog and analog to digital converters (DACs and ADCs), comes from a number of sources. For example, the voltages at the summing nodes in some operational amplifier circuits do not completely settle after switching operations, resulting in high frequency noise on the corresponding signal lines. This high frequency noise is then sampled onto the parasitic capacitance within the circuitry and subsequently folded-back into the signal baseband during later switching operations. Unacceptable noise and distortion can also be the result of an inadequate power supply rejection ratio (PSRR) within the various circuits and current “kicks” on the signal lines caused by the switching of unbalanced loads.
In noise sensitive applications, including audio processing, the minimization of distortion and noise are critical design factors, since often their ultimate effect is perceptible to the end-user. However, designing to minimize noise and harmonic distortion presents significant challenges, especially when other design factors must be considered, such as circuit complexity, chip area, and power consumption.